In integrated circuit memories, reference cells have been found useful for sensing the state of a selected memory cell by using a comparator circuit. A reference cell is designed to provide a voltage signal which is between voltage levels of different states of a memory cell. The signal provided by the reference cell is compared to that provided by the selected memory cell to determine the state of the memory cell. An advantage of the reference cell technique of sensing is that the reference cell experiences the same processing during the manufacturing process as does the memory cells. As the voltages provided by the memory cells change with process variation, so does the reference cell. Another positive effect of using reference cells has been tracking due to size variation. If the nominal channel length of a memory cell transistor is 2.0 microns, but the actual length is 1.8 microns, the reference cell will typically track the reduction in channel length. In a self-aligned MOS process, a polysilicon gate determines the channel length. Variations in the polysilicon dimensions for the memory cells will be tracked by the polysilicon dimensions of reference cell transistors.
Although reference cells have some advantages, there can be problems in matching variations which occur due to mask registration problems when memory cells vary in orientation. Mask registration variation causes, for example, variations in the spatial relationship of a polysilicon gate of a transistor and the field oxide which defines the active region of that transistor. Such problems can cause a memory transistor to increase in gain while decreasing the gain of the reference cell transistor. This causes the reference voltage to be closer to one of the states of the memory cell which thus makes detection more difficult.